NVIDIA Recruitment 2022:
Nvidia is hiring Graduates and post graduates for the position of ASIC Engineer across Hyderabad, Bangalore locations in India. Desirable candidates may apply to the post after reading the description of NVIDIA Recruitment 2022.
NVIDIA’s invention of the GPU sparked the PC gaming market. The company’s pioneering work in accelerated computing—a supercharged form of computing at the intersection of computer graphics, high performance computing and AI—is reshaping trillion-dollar industries, such as transportation, healthcare and manufacturing, and fueling the growth of many others.
NVIDIA Recruitment 2022 Overview:-
Company Name: Nvidia India
Job Position: ASIC Engineer
- BE/ B.Tech in Computers/ Electronics Engineering
- C++ modeling, test development
- RTL design, debug
- ASIC design & verification tools, methodologies
- Computer architecture, Graphics, GPU micro-architecture, parallel computing
- Performance evaluation, analysis and debug
- Perl/Python scripting
We are hiring across multiple positions in HW teams and a brief about the teams and their requirements is given below
As a Hardware Engineer at NVIDIA you will design and implement the industry’s leading Graphics, Video and Mobile Communications Processors. Specific areas include 2D and 3D graphics, mpeg, video, audio, network protocols, high-speed IO interfaces and bus protocols, and memory subsystem design. You will be responsible for Architecture and micro-architecture design of the ASICs, RTL design and synthesis, Logic and Timing verification using leading edge CAD tools and Semiconductor process technologies
CPU VERIFICATION TEAM
As a design verification engineer in the Nvidia’s CPU team, you will be working on the next generation of 64bit ARM architecture-based CPUs and SOCs. As part of this assignment, the intern will get a chance to learn about computer architecture at a very granular level, System Verilog, Unit/Cluster /SOC Verification, cutting edge verification methodologies and C/C++/ASM programming. The intern also will get an opportunity to get familiar with industry standard tools in verification and validation. During the course of the internship, the intern will contribute to building test benches, developing architectural simulators, modifying random instruction generators and creating stimulus for verification and validation of different units of the CPU and SOC.
Areas you will be working on
- Computer Architecture
- Digital Design and Programming in C/C++/Perl
- ARM, CPU Design and Verification/ Validation
ASIC-PD (Timing Closure / VLSI)
We are now looking for a Senior ASIC Design Engineer – Hardware.
As a member of our ASIC backend/timing team, you’ll be working on product designs, focusing on such tasks as clocks, timing convergence, chip layout planning, design optimization and automation of work flows. Specifically you’ll be focusing on full chip layout planning (partitioning, planning clock distribution and other structures, methodology), full chip timing closure signoff (using tools such as Synopsys Primetime, Cadence Tempus etc.), design optimization, and gate-level design of high-speed logic. In this role you will also interface with architecture, rtl design, layout implementation, methodology and custom design teams to drive design implementation, timing analysis/closure all the way from micro-architecture to tape-out.
What you’ll be doing:
- Develop and enhance timing analysis/signoff workflow from the frontend (pre-layout) to backend (post-layout) at both chip and block level.
- Chip level Integration, physically partitioning and floor planning.
- Develop custom timing scripts using tcl/primetime for clock skew analysis, special circuits such as clock dividers, core logic <-> IO macros interfaces such as PCI-E, Frame-Buffer/Memory, HDMI, etc.
- Design optimization and timing convergence-related tasks.
- Development of PD workflows.
NVIDIA Recruitment 2022 Apply Link: Click Here to apply